Layout pattern of two-port ternary content addressable memory
US11170854B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2020 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Dec 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A layout pattern of a two-port ternary content addressable memory (TCAM) includes a first storage unit, a second storage unit, a first comparison circuit and a second comparison circuit. The first comparison circuit and the second comparison circuit are positioned in a first side area of a side and a second side area of another side of the layout pattern, respectively. The first storage unit and the second storage unit are positioned in a first middle area and a second middle area between the first side area and the second side area, respectively. The first storage unit is connected to the first comparison circuit through a first gate structure and connected to the second comparison circuit through a second gate structure. The second storage unit is connected to the first comparison circuit through a third gate structure and connected to the second comparison circuit through a fourth gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.