Patent · US Active

Non-volatile memory device and control method

US11205494B2 · kind B2 · utility

0Cited by
8References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 18, 2021
Grant dateDec 21, 2021
Priority date
Expiry dateFeb 18, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/24
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory device includes a memory array including memory strings. Each memory string includes a plurality of top memory cells, a plurality of bottom memory cells, and one or more dummy memory cells between the top memory cells and the bottom memory cells. The memory device also includes a plurality of word lines respectively coupled to gate terminals of the top memory cells and the bottom memory cells, and one or more dummy word lines respectively coupled to gate terminals of the one or more dummy memory cells. The memory device further includes a control circuit configured to program a target memory cell coupled to a selected word line of the plurality of word lines. To program the target memory cell, the control circuit is configured to apply a biased dummy word line pre-pulse signal to the one or more dummy word lines in a pre-charge period prior to a programming period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.