Magnetic memory read circuit and calibration method therefor
US11211107B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Sep 24, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a nonvolatile memory device that includes a plurality of memory slices, each memory slice including one or more memory sectors and a read circuit for sensing the resistance state of a magnetic memory cell in the memory sectors. The read circuit includes first and second input nodes; a sense amplifier having first and second input terminals; a first target resistor and a balancing resistor connected in series between the first input node and the first input terminal; a multiplexer having a first input, a second input, and an output, with the first input being connected to the second input node and the output being connected to the second input terminal; a second target resistor and an offset resistor connected in series between the second input node and the second input; and first and second current sources connected to the first and second input terminals, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.