Method of manufacturing connection structure of semiconductor chip and method of manufacturing semiconductor package
US11264339B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2019 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Dec 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method of manufacturing a connection structure of a semiconductor chip includes: preparing a semiconductor chip having a first surface having a connection pad disposed thereon and a second surface opposing the first surface and including a passivation layer disposed on the first surface and covering the connection pad; forming an insulating layer on the first surface of the semiconductor chip, the insulating layer covering at least a portion of the passivation layer; forming a via hole penetrating through the insulating layer to expose at least a portion of the passivation layer; exposing at least a portion of the connection pad by removing the passivation layer exposed by the via hole; forming a redistribution via by filling the via hole with a conductive material; and forming a redistribution layer on the redistribution via and the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.