Large grain copper interconnect lines for MRAM
US11309216B2 · kind B2 · utility
1Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2020 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Sep 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Large grain metal bitlines are formed above magnetic tunnel junction pillars used as MRAM bits without materially affecting the magnetic properties of the magnetic tunnel junctions. A copper or copper alloy bitline having relatively small grains is formed over the pillars. Laser annealing is employed to melt the bitline. Subsequent cooling and recrystallization results in a reduction of the number of grain boundaries in the bitline and a reduction in bitline effective resistivity. Multiple melt/cool cycles may be used. Bitline grains are vertically aligned with the pillars in a resulting structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.