Quad-layer high-k for metal-insulator-metal capacitors
US11309383B1 · kind B1 · utility
2Cited by
5References
25Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 15, 2020 |
| Grant date | Apr 19, 2022 |
| Priority date | — |
| Expiry date | Dec 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure, and a method of making the same includes a multiple electrode stacked capacitor containing a sequence of first metal layers interleaved with second metal layers. A quad-layer stack separates each of the first metal layers from each of the second metal layers, the quad-layer dielectric stack includes a first dielectric layer made of Al2O3, a second dielectric layer made of HfO2, a third dielectric layer made of Al2O3, and a fourth dielectric layer made of HfO2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.