Patent · US Active

Efficient checking of a condition code anticipator for a floating point processor and/or unit

US11314512B2 · kind B2 · utility

0Cited by

9References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Petra Leber · Ehningen, DE
Kerstin Claudia Schelm · Stuttgart, DE
Cedric Lichtenau · Stuttgart, DE
Michael Klein · Schenefeld, DE

Key dates

Filing date	Aug 9, 2019
Grant date	Apr 26, 2022
Priority date	—
Expiry date	Sep 9, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/0772
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An aspect includes generating a data result and a special case indicator based on an instruction and at least one input data operand. Outputting the data result to a processor core. Outputting the first condition code to the processor core prior to outputting the data result to the processor core. Generating a second condition code based on the data result and the special case indicator. Performing a check by comparing the first condition code and the second condition code and flagging an error to the processor core upon the first condition code being different from the second condition code.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.