Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems
US11315877B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2020 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Mar 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic device includes a stack structure, a staircase structure, conductive pad structures, and conductive contact structures. The stack structure includes vertically alternating conductive structures and insulating structures arranged in tiers. Each of the tiers individually includes one of the conductive structures and one of the insulating structures. The staircase structure has steps made up of edges of at least some of the tiers of the stack structure. The conductive pad structures are on the steps of the staircase structure and include beta phase tungsten. The conductive contact structures are on the conductive pad structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.