Multi-die stacks with power management
US11320883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2018 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Dec 20, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus to provide power management for multi-die stacks using artificial intelligence are disclosed. An example multi-die package includes a computer processor unit (CPU) die, a memory die stacked in vertical alignment with the CPU die, and artificial intelligence (AI) architecture circuitry to infer a workload for at least one of the CPU die or the memory die. The AI architecture circuitry is to manage power consumption of at least one of the CPU die or the memory die based on the inferred workload.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.