Semiconductor package including an image sensor chip and a method of fabricating the same
US11335719B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Apr 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1434
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package may include a semiconductor chip structure, a transparent substrate disposed on the semiconductor chip structure, a dam placed on an edge of the semiconductor chip structure and between the semiconductor chip structure and the transparent substrate, and an adhesive layer interposed between the dam and the semiconductor chip structure. The semiconductor chip structure may include an image sensor chip and a logic chip, which are in contact with each other, and the image sensor chip may be closer to the transparent substrate than the logic chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.