Patent · US Active

Silicon-on-insulator die support structures and related methods

US11361970B2 · kind B2 · utility

0Cited by

5References

10Claims

0Family size

Assignee

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC · US

Inventors

Michael J. Seddon · Gilbert, US
Francis J. Carney · Mesa, US
Eiji KUROSE · Ora, JP
Chee Hiong CHEW · Seremban, MY
Soon Wei WANG · Seremban, MY

Key dates

Filing date	Apr 29, 2020
Grant date	Jun 14, 2022
Priority date	—
Expiry date	Apr 29, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/10156
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Implementations of a silicon-in-insulator (SOI) semiconductor die may include a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof. The first largest planar surface, the second largest planar surface, and the thickness may be included through a silicon layer coupled to a insulative layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.