Thin-film transistor structures with gas spacer

US11404536B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Travis W. Lajoie · Forest Grove, US
• Abhishek A. Sharma · Hillsboro, US
• Juan G. Alzate-Vinasco · Tigard, US
• Chieh-Jen Ku · Hillsboro, US
• Shem Ogadhoh · Beaverton, US
• Allen B. Gardiner · Portland, US
• Blake C. Lin · Portland, US
• Yih Wang · Portland, US
• Pei-Hua Wang · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Bernhard Sell · Dresden, DE
• Tahir Ghani · Portland, US

Key dates

• Filing date: Mar 30, 2018
• Grant date: Aug 2, 2022
• Expiry date: Aug 11, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D99/00
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An integrated circuit includes a base, a first transistor structure on or above the base, and a second transistor structure on or above the base, where the second transistor structure is spaced from the first transistor structure. An insulator material at least partially encapsulates an airgap or other gas pocket laterally between the first transistor structure and the second transistor structure. The gas pocket is at least 5 nm in height and at least 5 nm wide according to an embodiment, and in some cases is as tall or taller than active device layers of the transistor structures it separates.