Semiconductor package and method for fabricating a semiconductor package
US11410906B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Jun 10, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jun 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1431
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package for double sided cooling includes a first and a second carrier facing each other, at least one power semiconductor chip arranged between the first and second carriers, external contacts arranged at least partially between the first and second carriers, and spring elements arranged between the first and second carriers and configured to keep the first and second carriers at a predefined distance from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.