Electronic device including doped regions and a trench between the doped regions
US11411077B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Sep 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/406
Abstract
An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.