Patent · US Active

Semiconductor structure including a first surface mount component and a second surface mount component and method of fabricating the semiconductor structure

US11424213B2 · kind B2 · utility

2Cited by
12References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 10, 2020
Grant dateAug 23, 2022
Priority date
Expiry dateSep 10, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/18162
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.