Method of making memory cells, high voltage devices and logic devices on a substrate

US11444091B2 · kind B2 · utility

Assignee

• Silicon Storage Technology, Inc. · US

Inventors

• Jack Sun · Shanghai, CN
• Chunming Wang · Nanhu, CN
• Xian Liu · Sunnyvale, US
• Andy Yang · Tainan, TW
• Guo Xiang Song · Shanghai, CN
• Leo Xing · Shanghai, CN
• Nhan Do · Saratoga, US

Key dates

• Filing date: Dec 21, 2020
• Grant date: Sep 13, 2022
• Expiry date: Jan 28, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

A method of forming a semiconductor device by recessing the upper surface of a semiconductor substrate in first and second areas but not a third area, forming a first conductive layer in the first and second areas, forming a second conductive layer in all three areas, removing the first and second conductive layers from the second area and portions thereof from the first area resulting in pairs of stack structures each with a control gate over a floating gate, forming a third conductive layer in the first and second areas, forming a protective layer in the first and second areas and then removing the second conductive layer from the third area, then forming blocks of conductive material in the third area, then etching in the first and second areas to form select and HV gates, and replacing the blocks of conductive material with blocks of metal material.