Oscillation detection and mitigation in bit-flipping decoders
US11456757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2020 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Dec 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1128
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Devices, systems, and methods for detecting and mitigating oscillations in a bit-flipping decoder associated with a non-volatile memory are described. An example method includes receiving a noisy codeword based on a transmitted codeword generated from a low-density parity-check code, performing a first plurality of decoding iterations on the noisy codeword, which comprises performing a message passing algorithm in a first order, computing, based on a completion of the first plurality of decoding iterations, a plurality of checksum values and a plurality of bit flip counts corresponding to the first plurality of decoding iterations, determining that the plurality of checksum values and the plurality of bit flip counts are periodic with a period less than a predetermined threshold, and performing a subsequent decoding iteration on the noisy codeword, the subsequent decoding iteration comprising performing the message passing algorithm in a second order different from the first order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.