Inventor · San Jose, CA, US

Haobo Wang

46Patents
5h-index
21Co-inventors
69Inventor score

Filing activity: Feb 21, 2002 → Aug 10, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7212495B2 Signaling for reserving a communications path Electricity 14 Expired
US11018695B1 Fast-converging bit-flipping decoder for low-density parity-check codes Electricity 12 Active
US11108407B1 Performance of a bit flipping (BF) decoder of an error correction system Electricity 12 Active
US11184024B2 Error mitigation scheme for bit-flipping decoders for irregular low-density parity-check codes Physics 8 Active
USD1012317S1 Fence General 7 Active
US11190212B1 Dynamic control of quasi-cyclic low-density parity-check bit-flipping decoder Electricity 3 Active
USD1009300S1 Fence General 3 Active
US11967970B2 Bit-flipping decoder and decoding method for irregular codes Electricity 2 Active
US11322214B1 Gaussian modeling for soft-read threshold estimation in non-volatile memory devices Physics 2 Active
US11881871B1 On-the-fly scaling factor change for irregular LDPC codes Electricity 2 Active
US11355204B2 Efficient read-threshold calculation method for parametric PV-level modeling Electricity 2 Active
USD985103S1 Fixed sleeve for rod General 2 Active
US10991409B2 Encoder for memory system and method thereof Physics 1 Active
US11960989B2 Read threshold estimation systems and methods using deep learning Physics 1 Active
US11335417B1 Read threshold optimization systems and methods using model-less regression Physics 1 Active
US11204839B2 Memory system with low-latency read recovery and method of operating the memory system Physics 1 Active
US11770133B1 Exact ber reporting in the presence of CRC termination Electricity 1 Active
US11456757B2 Oscillation detection and mitigation in bit-flipping decoders Electricity 1 Active
US11206043B2 Bit-flipping decoder architecture for irregular quasi-cyclic low-density parity-check codes Electricity 1 Active
US11217319B2 Read threshold optimization systems and methods by multi-dimensional search Physics 1 Active
US11574698B1 Compressing deep neural networks used in memory devices Physics 1 Active
US11043969B2 Fast-converging soft bit-flipping decoder for low-density parity-check codes Electricity 1 Active
US11430530B2 Deep learning based program-verify modeling and voltage estimation for memory devices Physics 0 Active
US12112041B2 Out-of-order bit-flipping decoders for non-volatile memory devices Electricity 0 Active
US11769556B2 Systems and methods for modeless read threshold voltage estimation Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.