Memory devices including void spaces between transistor features, and related semiconductor devices and electronic systems

US11476259B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Kamal M. Karda · Boise, US
• Ramanathan Gandhi · Boise, US
• Hong Li · Nanhu, CN
• Haitao Liu · Boise, US
• Durai Vishak Nirmal Ramaswamy · Boise, US
• Sanh D. Tang · Boise, US
• Scott E. Sills · Boise, US

Key dates

• Filing date: Apr 14, 2021
• Grant date: Oct 18, 2022
• Expiry date: Apr 14, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D99/00

Abstract

A device comprises a vertical transistor. The vertical transistor comprises a semiconductive pillar, at least one gate electrode, a gate dielectric material, and void spaces. The semiconductive pillar comprises a source region, a drain region, and a channel region extending vertically between the source region and the drain region, the channel region comprising a semiconductive material having a band gap greater than 1.65 electronvolts. The at least one gate electrode laterally neighbors the semiconductive pillar. The gate dielectric material is laterally between the semiconductive pillar and the at least one gate electrode. The void spaces are vertically adjacent the gate dielectric material and laterally intervening between the at least one gate electrode and each of the source region and the drain region of the semiconductive pillar. Related electronic systems and methods are also disclosed.