Fin field-effect transistor device with low-dimensional material and method
US11476356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2020 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Jul 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/882
Abstract
A method includes: forming a dielectric fin protruding above a substrate; forming a channel layer over an upper surface of the dielectric fin and along first sidewalls of the dielectric fin, the channel layer including a low dimensional material; forming a gate structure over the channel layer; forming metal source/drain regions on opposing sides of the gate structure; forming a channel enhancement layer over the channel layer; and forming a passivation layer over the gate structure, the metal source/drain regions, and the channel enhancement layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.