Field effect transistor with at least partially recessed field plate

US11502178B2 · kind B2 · utility

Assignee

• Wolfspeed, Inc. · US

Inventors

• Kyle Bothe · Cary, US
• Jia Guo · Apex, US
• Terry Alcorn · Cary, US
• Fabian Radulescu · Chapel Hill, US
• Scott Sheppard · Chapel Hill, US

Key dates

• Filing date: Oct 27, 2020
• Grant date: Nov 15, 2022
• Expiry date: Oct 27, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/411

Abstract

A transistor device includes a semiconductor layer, a surface dielectric layer on the semiconductor layer, and at least a portion of a gate on the surface dielectric layer. The surface dielectric layer includes an aperture therein that is laterally spaced apart from the gate. The transistor device includes an interlayer dielectric layer on the surface dielectric layer, and a field plate on the interlayer dielectric layer. The field plate is laterally spaced apart from the gate, and at least a portion of the field plate includes a recessed portion above the aperture in the surface dielectric layer.