Non-volatile memory system using strap cells in source line pull down circuits
US11508442B2 · kind B2 · utility
0Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Oct 19, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a flash memory device that uses strap cells in a memory array of non-volatile memory cells as source line pull down circuits. In one embodiment, the strap cells are erase gate strap cells. In another embodiment, the strap cells are source line strap cells. In another embodiment, the strap cells are control gate strap cells. In another embodiment, the strap cells are word line strap cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.