Method for processing a semiconductor wafer, semiconductor composite structure and support structure for semiconductor wafer

US11515264B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Francisco Javier Santos Rodriguez · Villach, AT
• Alexander Breymesser · Villach, AT
• Erich Griebl · Dorfen, DE
• Michael Knabl · Sattendorf, AT
• Matthias Kuenle · Villach, AT
• Andreas Moser · Cugnaux, FR
• Roland Rupp · Achern, DE
• Hans-Joachim Schulze · Taufkirchen, DE
• Sokratis Sgouridis · Annenheim, AT
• Stephan Voss · Munich, DE

Key dates

• Filing date: May 24, 2019
• Grant date: Nov 29, 2022
• Expiry date: Oct 29, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/16
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.