Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array
US11521682B2 · kind B2 · utility
1Cited by
8References
12Claims
0Family size
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Key dates
| Filing date | Nov 11, 2020 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Nov 11, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Numerous embodiments are disclosed for providing temperature compensation in an analog memory array. A method and related system are disclosed for compensating for temperature changes in an array of memory cells by measuring an operating temperature within the array of memory cells and changing a threshold voltage of a selected memory cell in the array of memory cells to compensate for a change in the operating temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.