Patent · US Active

Control flow mechanism for execution of graphics processor instructions using active channel packing

US11537403B2 · kind B2 · utility

0Cited by

6References

22Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Subramaniam Maiyuran · Citrus, US
Guei-Yuan Lueh · San Jose, US
Supratim Pal · Bengaluru, IN
Gang Chen · Milpitas, US
Ananda V. Kommaraju · Kanchinakote, IN
Joy Chandra · Bengaluru, IN
Altug Koker · Cameron Park, US
Prasoonkumar Surti · Folsom, US
David Puffer · Tempe, US
Hong Bin Liao · Beijing, CN
Joydeep Ray · Folsom, US
Abhishek R. Appu · Cameron Park, US
Ankur N. Shah · Folsom, US
Travis T. Schluessler · Hillsboro, US
Jonathan Kennedy · Bristol, GB
Devan Burke · Portland, US

Key dates

Filing date	Mar 26, 2021
Grant date	Dec 27, 2022
Priority date	—
Expiry date	Mar 26, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG06T1/20
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An apparatus to facilitate control flow in a graphics processing system is disclosed. The apparatus includes logic a plurality of execution units to execute single instruction, multiple data (SIMD) and flow control logic to detect a diverging control flow in a plurality of SIMD channels and reduce the execution of the control flow to a subset of the SIMD channels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.