David Puffer
72Patents
6h-index
114Co-inventors
75Inventor score
Filing activity: Mar 29, 1996 → Jan 17, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6734862B1 | Memory controller hub | Physics | 19 | Expired |
| US10380039B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 17 | Active |
| US7120765B2 | Memory transaction ordering | Physics | 17 | Expired |
| US6125425A | Memory controller performing a mid transaction refresh and handling a suspend signal | Electricity | 13 | Expired |
| US5901298A | Method for utilizing a single multiplex address bus between DRAM, SRAM and ROM | Physics | 11 | Expired |
| US6871119B2 | Filter based throttling | Physics | 7 | Expired |
| US10423415B2 | Hierarchical general register file (GRF) for execution block | Emerging Cross-Sectional Technologies | 6 | Active |
| US7178045B2 | Optimizing exit latency from an active power management state | Emerging Cross-Sectional Technologies | 5 | Expired |
| US7631118B2 | Lane to lane deskewing via non-data symbol processing for a serial point to point link | Electricity | 5 | Active |
| US7913001B2 | Lane to lane deskewing via non-data symbol processing for a serial point to point link | Electricity | 4 | Active |
| US10649956B2 | Engine to enable high speed context switching via on-die storage | Physics | 4 | Active |
| US8924756B2 | Processor core with higher performance burst operation with lower power dissipation sustained workload mode | Emerging Cross-Sectional Technologies | 4 | Active |
| US7339995B2 | Receiver symbol alignment for a serial point to point link | Electricity | 4 | Expired |
| US9542336B2 | Isochronous agent data pinning in a multi-level memory system | Physics | 2 | Active |
| US10373285B2 | Coarse grain coherency | Physics | 2 | Active |
| US10282812B2 | Page faulting and selective preemption | Physics | 2 | Active |
| US7979608B2 | Lane to lane deskewing via non-data symbol processing for a serial point to point link | Electricity | 2 | Active |
| US11157431B2 | System, apparatus and method for multi-die distributed memory mapped input/output support | Physics | 2 | Active |
| US10719447B2 | Cache and compression interoperability in a graphics processor pipeline | Emerging Cross-Sectional Technologies | 2 | Active |
| US11210265B2 | Engine to enable high speed context switching via on-die storage | Physics | 2 | Active |
| US8346992B2 | Peripheral interface alert message for downstream device | Electricity | 1 | Active |
| US11360914B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 1 | Active |
| US10783084B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 1 | Active |
| US11748302B2 | Engine to enable high speed context switching via on-die storage | Physics | 1 | Active |
| US11263141B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.