Non-planar transistors with channel regions having varying widths

US11569231B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Stephen D. Snyder · Portland, US
• Leonard P. GULER · Hillsboro, US
• Richard E. Schenker · Portland, US
• Michael K. Harper · Hillsboro, US
• Sam Sivakumar · Hillsboro, US
• Urusa Alaan · Hillsboro, US
• Stephanie A. Bojarski · Beaverton, US
• Achala Bhuwalka · Hillsboro, US

Key dates

• Filing date: Mar 15, 2019
• Grant date: Jan 31, 2023
• Expiry date: May 31, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0128
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques are disclosed for non-planar transistors having varying channel widths (Wsi). In some instances, the resulting structure has a fin (or nanowires, nanoribbons, or nanosheets) comprising a first channel region and a second channel region, with a source or drain region between the first channel region and the second channel region. The widths of the respective channel regions are independent of each other, e.g., a first width of the first channel region is different from a second width of the second channel region. The variation in width of a given fin structure may vary in a symmetric fashion or an asymmetric fashion. In an embodiment, a spacer-based forming approach is utilized that allows for abrupt changes in width along a given fin. Sub-resolution fin dimensions are achievable as well.