Inventor · Hillsboro, OR, US

Sam Sivakumar

14Patents
9h-index
21Co-inventors
72Inventor score

Filing activity: Dec 31, 1997 → Mar 15, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US6365529B1 Method for patterning dual damascene interconnects using a sacrificial light absorbing material Physics 60 Expired
US6329118A Method for patterning dual damascene interconnects using a sacrificial light absorbing material Physics 57 Expired
US6406995B1 Pattern-sensitive deposition for damascene processing Electricity 43 Expired
US6037255A Method for making integrated circuit having polymer interlayer dielectric Electricity 34 Expired
US6350670B1 Method for making a semiconductor device having a carbon doped oxide insulating layer Electricity 24 Expired
US6649515B2 Photoimageable material patterning techniques useful in fabricating conductive lines in circuit structures Electricity 23 Expired
US6020266A Single step electroplating process for interconnect via fill and metal line patterning Electricity 21 Expired
US6384481B1 Single step electroplating process for interconnect via fill and metal line patterning Electricity 16 Expired
US6774037B2 Method integrating polymeric interlayer dielectric in integrated circuits Electricity 9 Expired
US7648803B2 Diagonal corner-to-corner sub-resolution assist features for photolithography Physics 8 Active
US7056645B2 Use of chromeless phase shift features to pattern large area line/space geometries Physics 5 Expired
US7374865B2 Methods to pattern contacts using chromeless phase shift masks Physics 5 Expired
US7179570B2 Chromeless phase shift lithography (CPL) masks having features to pattern large area line/space geometries Physics 2 Expired
US11569231B2 Non-planar transistors with channel regions having varying widths Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.