Compressing deep neural networks used in memory devices
US11574698B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2021 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Sep 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices, systems and methods for improving performance of a memory device are described. An example method includes receiving one or more parameters associated with a plurality of previous read operations on a page of the memory device, wherein the previous read operations are based on a plurality of read voltages, determining, using the one or more parameters as an input to a deep neural network comprising a plurality of layers, an updated plurality of read voltages, wherein each of the plurality of layers is a fully connected layer, and applying the updated plurality of read voltages to the memory device to retrieve information from the memory device, wherein the deep neural network uses a plurality of weights that have been processed using at least one of (a) a pruning operation, (b) a non-uniform quantization operation, or (c) a Huffman encoding operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.