Refresh counters in a memory system
US11579784B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2020 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Nov 5, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for refresh counters in a memory system are described. In some examples, a memory device may include two or more counters configured to increment a respective count based on refresh operations performed on a memory array. A comparison may be made between two or more of the respective counts, which may include determining a difference between the respective counts or a difference in rate of incrementing. A memory device may transmit an indication to a host device based on determining a difference between counters, and the memory device, the host device, or both, may perform various operations or enter various operational modes based on the determined difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.