Autonomous memory architecture
US11586577B2 · kind B2 · utility
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25References
19Claims
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Key dates
| Filing date | Sep 3, 2020 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Apr 7, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17318
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An autonomous memory device in a distributed memory sub-system can receive a database downloaded from a host controller. The autonomous memory device can pass configuration routing information and initiate instructions to disperse portions of the database to neighboring die using an interface that handles inter-die communication. Information is then extracted from the pool of autonomous memory and passed through a host interface to the host controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.