Inventor · Penryn, CA, US

Sean Eilert

27Patents
7h-index
11Co-inventors
62Inventor score

Filing activity: Dec 31, 2008 → Sep 3, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US8601202B1 Full chip wear leveling in memory device Physics 43 Active
US7936610B1 Selective refresh of single bit memory cells Physics 22 Active
US9123409B2 Memory device for a hierarchical memory architecture Emerging Cross-Sectional Technologies 11 Active
US9626327B2 Memory device for a hierarchical memory architecture Emerging Cross-Sectional Technologies 10 Active
US9015440B2 Autonomous memory subsystem architecture Physics 8 Active
US7944764B1 Writing to non-volatile memory during a volatile memory refresh cycle Physics 7 Active
US9183070B2 Resting blocks of memory cells in response to the blocks being deemed to fail Physics 7 Active
US8572466B2 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory Physics 7 Active
US8239629B2 Hierarchical memory architecture to connect mass storage devices Physics 7 Active
US9047191B2 Error control in memory storage systems Electricity 5 Active
US8504893B1 Error detection or correction of a portion of a codeword in a memory device Electricity 5 Active
US8621148B2 Hierarchical memory architecture to connect mass storage devices Physics 4 Active
US9779057B2 Autonomous memory architecture Physics 4 Active
US10031879B2 Memory device for a hierarchical memory architecture Emerging Cross-Sectional Technologies 2 Active
US10432230B2 Error detection or correction of a portion of a codeword in a memory device Electricity 2 Active
US8635514B2 Error control in memory storage systems Electricity 1 Active
US10725956B2 Memory device for a hierarchical memory architecture Emerging Cross-Sectional Technologies 1 Active
US9563501B2 Preserving data integrity in a memory system Electricity 1 Active
US8578095B2 Hierarchical memory architecture using a concentrator device Emerging Cross-Sectional Technologies 1 Active
US8806303B2 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory Physics 1 Active
US9165688B2 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory Physics 0 Active
US8521952B2 Hierarchical memory architecture with a phase-change memory (PCM) content addressable memory (CAM) Physics 0 Active
US10083122B2 Transactional memory Physics 0 Active
US11586577B2 Autonomous memory architecture Physics 0 Active
US10146617B2 Error control in memory storage systems Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.