Multi-layer neural network processing by a neural network accelerator using host communicated merged weights and a package of per-layer instructions

US11620490B2 · kind B2 · utility

Assignee

• XILINX, INC. · US

Inventors

• Aaron Ng · San Jose, US
• Elliott Delaye · San Jose, US
• Ehsan Ghasemi · San Jose, US
• Xiao Teng · Cupertino, US
• Jindrich Zejda · Saratoga, US
• Yongjun Wu · Redmond, US
• Sean Settle · San Jose, US
• Ashish Sirasao · San Jose, US

Key dates

• Filing date: Oct 17, 2017
• Grant date: Apr 4, 2023
• Expiry date: May 1, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N3/08
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In the disclosed methods and systems for processing in a neural network system, a host computer system writes a plurality of weight matrices associated with a plurality of layers of a neural network to a memory shared with a neural network accelerator. The host computer system further assembles a plurality of per-layer instructions into an instruction package. Each per-layer instruction specifies processing of a respective layer of the plurality of layers of the neural network, and respective offsets of weight matrices in a shared memory. The host computer system writes input data and the instruction package to the shared memory. The neural network accelerator reads the instruction package from the shared memory and processes the plurality of per-layer instructions of the instruction package.