Patent · US Active

Substrate-less FinFET diode architectures with backside metal contact and subfin regions

US11652107B2 · kind B2 · utility

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Key dates

Filing dateJun 20, 2019
Grant dateMay 16, 2023
Priority date
Expiry dateSep 12, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/111

Abstract

Embodiments include diode devices and transistor devices. A diode device includes a first fin region over a first conductive region and an insulator region, and a second fin region over a second conductive and insulator regions, where the second fin region is laterally adjacent to the first fin region, and the insulator region is between the first and second conductive regions. The diode device includes a first conductive via on the first conductive region, where the first conductive via is vertically adjacent to the first fin region, and a second conductive via on the second conductive region, where the second conductive via is vertically adjacent to the second fin region. The diode device may include conductive contacts, first portions on the first fin region, second portions on the second fin region, and gate electrodes between the first and second portions and the conductive contacts.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.