Substrates including useful layers

US11670540B2 · kind B2 · utility

Assignees

• SOITEC · FR
• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Didier Landru · Le Champ-près-Froges, FR
• Nadia Ben Mohamed · Échirolles, FR
• Oleg Kononchuk · Battle Ground, US
• Frédéric Mazen · Grenoble, FR
• Damien Massy · Grenoble, FR
• Shay Reboh · Grenoble, FR
• Francois Rieutord · St-Estève, FR

Key dates

• Filing date: Mar 2, 2021
• Grant date: Jun 6, 2023
• Expiry date: Jun 1, 2041

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B81C2201/0192
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Substrates may include a useful layer affixed to a support substrate. A surface of the useful layer located on a side of the useful layer opposite the support substrate may include a first region and a second region. The first region may have a first surface roughness, may be located proximate to a geometric center of the surface, and may occupy a majority of an area of the surface. The second region may have a second, higher surface roughness, may be located proximate to a periphery of the surface, and may occupy a minority of the area of the surface.