Patent · US Active

Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism

US11682459B2 · kind B2 · utility

1Cited by

2References

27Claims

0Family size

Assignee

Silicon Storage Technology, Inc. · US

Inventors

Hieu Van Tran · San Jose, US
Stanley Hong · Palo Alto, US
Stephen Trinh · San Jose, US
Thuan Vu · San Jose, US
Steven Lemke · Boulder Creek, US
Vipin Tiwari · Dublin, US
Nhan Do · Saratoga, US

Key dates

Filing date	Oct 28, 2020
Grant date	Jun 20, 2023
Priority date	—
Expiry date	Dec 31, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/4013
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Two or more physical memory cells are grouped together to form a logical cell that stores one of N possible levels. Within each logical cell, the memory cells can be programmed using different mechanisms. For example, one or more of the memory cells in a logical cell can be programmed using a coarse programming mechanism, one or more of the memory cells can be programmed using a fine mechanism, and one or more of the memory cells can be programmed using a tuning mechanism. This achieves extreme programming accuracy and programming speed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.