Copper deposition in wafer level packaging of integrated circuits
US11697884B2 · kind B2 · utility
0Cited by
7References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 12, 2021 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Aug 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3656
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor; and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.