Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic
US11699591B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Feb 4, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
First lithography and etching are carried out on a semiconductor structure to provide a first intermediate semiconductor structure having a first set of surface features corresponding to a first portion of desired fin formation mandrels. Second lithography and etching are carried out on the first intermediate structure, using a second mask, to provide a second intermediate semiconductor structure having a second set of surface features corresponding to a second portion of the mandrels. The second set of surface features are unequally spaced from the first set of surface features and/or the features have different pitch. The fin formation mandrels are formed in the second intermediate semiconductor structure using the first and second sets of surface features; spacer material is deposited over the mandrels and is etched back to form a third intermediate semiconductor structure having a fin pattern. Etching is carried out on same to produce the fin pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.