Chamber processes for reducing backside particles
US11702738B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 17, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | May 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/32862
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods of semiconductor processing may include performing a first plasma treatment within a processing chamber to remove a first carbon-containing material. The methods may include performing a second plasma treatment within the processing chamber to remove a first silicon-containing material. The methods may include depositing a second silicon-containing material on surfaces of the processing chamber. The methods may include depositing a second carbon-containing material overlying the second silicon-containing material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.