Magnetoresistive random access memory
US11706996B2 · kind B2 · utility
2Cited by
5References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Nov 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.