Patent · US Active

Parent substrate, wafer composite and methods of manufacturing crystalline substrates and semiconductor devices

US11712749B2 · kind B2 · utility

0Cited by
2References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 6, 2020
Grant dateAug 1, 2023
Priority date
Expiry dateJan 3, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/304
  • WIPO fieldMachine tools
  • WIPO sectorMechanical engineering

Abstract

Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.