Method of programming and verifying memory device and related memory device
US11721403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2021 |
| Grant date | Aug 8, 2023 |
| Priority date | — |
| Expiry date | Feb 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
When programming and verifying a memory device which includes a plurality of memory cells and a plurality of word lines, a first coarse programming is first performed on a first memory cell among the plurality of memory cells which is controlled by a first word line among the plurality of word lines, and then a second coarse programming is performed on a second memory cell among the plurality of memory cells which is controlled by a second word line among the plurality of word lines. Next, a first coarse verify current is used for determining whether the first memory cell passes a coarse verification and a second coarse verify current is used for determining whether the second memory cell passes a second coarse verification, wherein the second coarse verify current is smaller than the first coarse verify current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.