Two-port on-wafer calibration piece circuit model and method for determining parameters

US11733298B2 · kind B2 · utility

Assignee

• THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION · CN

Inventors

• Yibang Wang · Shijiazhuang, CN
• Aihua Wu · Xinzhai, CN
• Faguo Liang · Shijiazhuang, CN
• Chen Liu · Weihai, CN
• Ye Huo · Shijiazhuang, CN
• Peng Luan · Shijiazhuang, CN
• Jing Sun · Suzhou, CN
• Yanli Li · Los Angeles, US

Key dates

• Filing date: Dec 14, 2021
• Grant date: Aug 22, 2023
• Expiry date: Mar 9, 2042

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R35/005
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

The present application provides two-port on-wafer calibration piece circuit models and a method for determining parameters. The method includes: measuring a single-port on-wafer calibration piece circuit model corresponding to a first frequency band to obtain a first S parameter; calculating, according to the first S parameter, an intrinsic capacitance value of a two-port on-wafer calibration piece circuit model corresponding to the single-port on-wafer calibration piece circuit model; measuring the two-port on-wafer calibration piece circuit model corresponding to the terahertz frequency band to obtain a second S parameter; and calculating a parasitic capacitance value and a parasitic resistance value of the two-port on-wafer calibration piece circuit model according to the second S parameter and the intrinsic capacitance value.