Method of forming a semiconductor device with memory cells, high voltage devices and logic devices on a substrate

US11737266B2 · kind B2 · utility

Assignee

• Silicon Storage Technology, Inc. · US

Inventors

• Guo Xiang Song · Shanghai, CN
• Chunming Wang · Nanhu, CN
• Leo Xing · Shanghai, CN
• Xian Liu · Sunnyvale, US
• Nhan Do · Saratoga, US

Key dates

• Filing date: Jun 4, 2021
• Grant date: Aug 22, 2023
• Expiry date: Feb 16, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/8314

Abstract

A method of forming a semiconductor device by recessing the upper surface of a semiconductor substrate in first and second areas but not a third area, forming a first conductive layer in the three areas, forming a second conductive layer in all three areas, removing the first and second conductive layers from the second area and portions thereof from the first area resulting in pairs of stack structures each with a control gate over a floating gate, forming a third conductive layer in all three areas, forming a protective layer in the first and second areas and then removing the third conductive layer from the third area, then forming blocks of dummy conductive material in the third area, then etching in the first and second areas to form select and HV gates, and then replacing the blocks of dummy conductive material with blocks of metal material.