Forming terminations in stacked memory arrays
US11756826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Mar 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.