Inventor · Boise, ID, US

Brett D. Lowe

28Patents
5h-index
41Co-inventors
69Inventor score

Filing activity: Jul 30, 2001 → Jan 10, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US10141330B1 Methods of forming semiconductor device structures, and related semiconductor device structures, semiconductor devices, and electronic systems Electricity 38 Active
US10083981B2 Memory arrays, and methods of forming memory arrays Electricity 18 Active
US6642112B1 Non-oxidizing spacer densification method for manufacturing semiconductor devices Electricity 17 Expired
US9659949B2 Integrated structures Electricity 8 Active
US6849510B2 Non-oxidizing spacer densification method for manufacturing semiconductor devices Electricity 5 Expired
US8575716B2 Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation Electricity 3 Active
US7508038B1 ESD protection transistor Electricity 3 Expired
US7927944B1 ESD protection transistor Electricity 2 Active
US10269819B2 Integrated structures and methods of forming vertically-stacked memory cells Electricity 2 Active
US8093121B1 ESD protection transistor Electricity 2 Active
US8461016B2 Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation Electricity 1 Active
US10658380B2 Formation of termination structures in stacked memory arrays Electricity 1 Active
US10446579B2 Three-dimensional memory devices, and related methods and electronic systems Electricity 1 Active
US10304853B2 Memory arrays, and methods of forming memory arrays Electricity 1 Active
US11605642B2 Microelectronic devices including stair step structures, and related memory devices, electronic systems, and methods Electricity 1 Active
US11177279B2 Formation of termination structures in stacked memory arrays Electricity 0 Active
US11756826B2 Forming terminations in stacked memory arrays Electricity 0 Active
US10985179B2 Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias Electricity 0 Active
US10978474B2 Devices including stack structures, and related methods and electronic systems Electricity 0 Active
US11121146B2 Forming terminations in stacked memory arrays Electricity 0 Active
US11417681B2 Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias Electricity 0 Active
US10541252B2 Memory arrays, and methods of forming memory arrays Electricity 0 Active
US11705385B2 Memory arrays and methods used in forming a memory array and conductive through-array-vias (TAVs) Electricity 0 Active
US12178041B2 Microelectronic devices including slot structures and additional slot structures Electricity 0 Active
US11069598B2 Memory arrays and methods used in forming a memory array and conductive through-array-vias (TAVs) Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.