Patent · US Active

Method of forming a through-substrate via and a semiconductor device comprising a through-substrate via

US11764109B2 · kind B2 · utility

0Cited by
2References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 3, 2019
Grant dateSep 19, 2023
Priority date
Expiry dateJun 5, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/481
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.