Semiconductor device and method
US11817482B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2020 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Apr 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a composite layer having a first and second opposing surfaces. The composite layer includes a mesa and a first insulating layer. The mesa has top and bottom surfaces and side faces. The side faces are embedded in the first insulating layer. The mesa includes a Group III nitride-based multilayer structure providing a Group III nitride based device having first and second electrodes arranged on the mesa top surface. First and second outer contacts are positioned on the second surface of the composite layer. A first conductive via extends through the first insulating layer and is electrically coupled to the first electrode on the mesa top surface and to the first outer contact. A second conductive via extends through the first insulating layer and is electrically coupled to the second electrode on the mesa top surface and to the second outer contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.