Patent · US Active

Re-fetching data for L3 cache data evictions into a last-level cache

US11847062B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Tarun Nakra · Austin, US
Jay Fleischman · Fort Collins, US
Gautam Tarasingh Hazari · Grafton, GB
Akhil Arunkumar · Santa Clara, US
William L. Walker · Fort Collins, US
Gabriel H. Loh · Bellevue, US
John Kalamatianos · Boxborough, US
Marko Scrbak · Austin, US

Key dates

Filing date	Dec 16, 2021
Grant date	Dec 19, 2023
Priority date	—
Expiry date	Dec 16, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In response to eviction of a first clean data block from an intermediate level of cache in a multi-cache hierarchy of a processing system, a cache controller accesses an address of the first clean data block. The controller initiates a fetch of the first clean data block from a system memory into a last-level cache using the accessed address.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.