Precise data tuning method and apparatus for analog neural memory in an artificial neural network
US11847556B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2022 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Jul 27, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/44
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Numerous examples of a precision programming apparatus are disclosed for precisely and quickly depositing the correct amount of charge on the floating gate of a non-volatile memory cell within a vector-by-matrix multiplication (VMM) array in an artificial neural network. In one example, a neuron output circuit for providing a current to program as a weight value in a selected memory cell in a vector-by-matrix multiplication array is disclosed, the neuron output circuit comprising a first adjustable current source to generate a scaled current in response to a neuron current to implement a positive weight, and a second adjustable current source to generate a scaled current in response to a neuron current to implement a negative weight.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.